1. Technical Field of the Invention
The present invention relates to integrated circuits and more particularly to integrated circuits comprising at least one capacitor.
2. Description of Related Art
It is known to produce planar or three-dimensional capacitors using an aluminum technology (by reactive ion etching or RIE) or a copper technology (damascene method).
Capacitors are conventionally obtained from an MIM (metal-insulator-metal) capacitive multilayer in which the lower layer is a conducting material, such as for example, TiN, the insulator is a dielectric, for example having a high permittivity (or high-k dielectric), and the upper electrode is a conducting material, such as TiN. These capacitors are generally produced separately and then assembled in a complex circuit. The production of capacitors within even one integrated circuit still remains today a challenge, given that this production must be compatible with the existence of active components within this complex circuit.
Within an integrated circuit, the capacitor is generally produced before the interconnection level is produced. The production of the interconnection level comprises a metallization level, a metal etching step in order to obtain the interconnection lines and the deposition of an insulator, such as an intermetallic dielectric. Generally, during the metal etching step, the electrodes of the capacitor are damaged. More particularly, the electrodes may be partly or completely eroded by the overetching of the metal. When the lower electrode is offset, the overetching of the metal may completely erode it to the point of eliminating its offset part. It may also happen that two electrodes are brought into contact with each other via residues of underetched metal.